Table of Contents
|
Table of Contents
CHAPTER 1 PACKAGING EVOLUTION 1.1.0 Package Pricing Trends 1.2.0 Metric Conversion 1.3.0 Package Trends 1.4.0 COB Technology 1.5.0 Wirebonding Technology 1.5.1 Ball Bonding 1.5.2 Wedge Bonding 1.5.3 Thermosonic Bonding 1.5.4 Thermocompression Bonding 1.5.5 Ultrasonic Bonding 1.6.0 Wirebonding Parameters 1.7.0 Flip Chip Technology 1.8.0 Multiple-chip Technology 1.8.1 MCM - Flex 1.9.0 TCP Technology 1.10.0 BGA Technology 1.10.1 PBGA 1.10.2 BGA Standards 1.10.3 BGA Lead Configurations 1.10.4 BGA Row & Column Markings 1.10.5 Sockets 1.10.6 PBGA Lids 1.10.7 BGA Thermals 1.10.8 BGA Moisture Sensitivity 1.10.9 Super BGA 1.10.10 Small Ball BGA 1.11.0 Ceramic BGA's 1.12.0 Ceramic Column Grid Array 1.13.0 Tape Ball Grid Array 1.14.0 Chip Scale Packaging CHAPTER 2 PCB & Design 2.1.0 PC Board Design Decisions 2.2.0 Thin Boards 2.3.0 Vias 2.4.0 Trace Widths 2.5.0 Trace Spacing 2.6.0 Routing Layers 2.7.0 Layer Structures and Choices 2.8.0 Thermal 2.9.0 Solder Mask 2.10.0 Plating Types 2.11.0 Bare Board Test 2.12.0 Placement Considerations 2.12.1 COB Placement 2.12.2 Flip Chip Clearance Considerations 2.12.3 BGA Packages Placement Considerations 2.13.0 Advance Packaging Decisions 2.14.0 High-Density Assembly 2.15.0 Double-Side Mount Assemblies 2.16.0 Wave Soldering Limitations for New Technologies 2.17.0 Conserving Real Estate Chapter 3 Flex Circuitry 3.1.0 Flex Terms and Considerations 3.2.0 Evolving Flex 3.3.0 Cost of Flex 3.4.0 Epoxy Glass Core 3.5.0 Cover Coat 3.6.0 Copper Conductors 3.7.0 Sculptured Conductors 3.8.0 Polymer Conductors 3.9.0 Flip Chip on Flex 3.10.0 Types of Flex Designs for Assembly 3.11.0 Assembly Requirements for Flex 3.12.0 Connections to Flex 3.13.0 Multilayer Flex CHAPTER 4 LAND PATTERNS 4.1.0 Land Patterns for BGA Packages 4.2.0 Solder Mask Defined Pads 4.3.0 Non-Solder Mask Defined Pads 4.4.0 BGA Land Options 4.5.0 Staggered Ball Patterns 4.6.0 BGA Collapsible Ball Lead 4.7.0 Non-Collapsible BGA Ball Lands 4.8.0 Lands for Columns Used on BGA Packages 4.9.0 Vias in Lands for BGA Leads 4.10.0 BGA Land Pattern Vs Reliability 4.11.0 BGA Layer Count 4.12.0 BGA Routing Channels 4.13.0 Peripheral BGA Designs 4.14.0 BGA Pinouts 4.14.1 BGA Power & Ground 4.14.2 Decoupling Capacitors 4.14.3 Terminator Location for Peripheral PBGA 4.15.0 BGA Pads to Vias 4.16.0 Enhancing BGA for X-Ray Inspection 4.17.0 FLIP CHIP & COB Lands 4.17.1 Flip Chip Land Patterns 4.17.2 COB Lands Patterns Chapter 5 Manufacturing Issues 5.1.0 High-Density Assembly 5.1.1 Fiducials 5.1.2 Alignment Marks for BGA's 5.1.3 Special Centering Pads for BGA's 5.1.4 COB Design for Assembly Considerations 5.1.5 Flip Chip Design for Assembly Considerations 5.2.0 Panels & Pallets 5.3.0 PCB Plating 5.4.0 Inspection & Repair Issues 5.4.1 BGA Packages 5.4.2 Flip chip Technology 5.4.3 COB 5.5.0 Cleaning Issues 5.6.0 In-Circuit Test Issues Chapter 6 FABRICATION & DOCUMENTATION 6.1.0 Assembly Documentation 6.2.0 Flex Fabrication 6.2.1 Creating Vias 6.2.2 Cutting Edges 6.2.3 Cover Layer 6.2.4 Stack Up 6.2.5 Stress Points 6.3.0 PC Fabrication 6.3.1 PCB Plating Considerations 6.3.2 Immersion Process 6.3.3 Electroplating Process 6.3.4 Electroless Process 6.4.0 Selecting the Plating Composition 6.5.0 Organic Coatings 6.6.0 Fabrication Notes.  |
| Copyright © 2004, SMT Plus Inc. |
